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20220905 - Hardware FIR Filter on Pynq Board

I used this tutorial to implement the FIR filter. However there are minor changes in this tutorial because it is a bit outdated.

  1. When you generate the block diagram it is necessary to generate the hwh file that can be found at <prj>.gen/sources_1/bd/<bd_name>/hw_handoff/<bd_name>.hwh
  2. Copy the files PROJECT_NAME/.runs/impl_1/*.bit and PROJECT_NAME/.runs/impl_1/*.tcl
  3. The library Xlnk is not available anymore so you need to modify the code of the FPGA part:
from pynq import allocate
import numpy as np

# Allocate buffers for the input and output signals
in_buffer = allocate(shape=(n,), dtype=np.int32)
out_buffer = allocate(shape=(n,), dtype=np.int32)

# Copy the samples to the in_buffer
np.copyto(in_buffer, samples)

# Trigger the DMA transfer and wait for the result
import time
start_time = time.time()
dma.sendchannel.transfer(in_buffer)
dma.recvchannel.transfer(out_buffer)
dma.sendchannel.wait()
dma.recvchannel.wait()
stop_time = time.time()
hw_exec_time = stop_time - start_time
print('Hardware FIR execution time: ', hw_exec_time)
print('Hardware acceleration factor: ', sw_exec_time / hw_exec_time)

# Plot the result to notebook
plot_to_notebook(t, samples, 1000, out_signal=out_buffer)

in_buffer.close()
out_buffer.close()