It happened to me that I am getting error from the PCB manufacturer with the polygon pours and the vias. There is a simple way to fix the problem and is like:

• Tools > Polygon Pour > Polygon Pour Manager
• Select all your Polygon Pour
• Then New Clearance Rule…
• Put a name and accept it.

And the edge should be like:

• Design rules
• BoardOutlineClearance
• Put poly to 10